The utilization of replacement metal gates is the typical approach for active device schemes, which typically involves a number of chemical-mechanical polishing (CMP) steps. Active devices can include multiple gate structures such as, FinFETs or planar MOSFETs. Typically, a high quality material is desired as the stop layer for the CMP process. Currently, oxide deposited by a combination of flowable chemical vapor deposition (FCVD) and high density plasma (HDP) can be utilized as dielectric material. FCVD oxide is typically a soft material, utilized for high aspect ratio gap fill. FCVD is not an optimal CMP stop layer due to flowable oxide being a soft material susceptible to dishing that can occur on the top surface. HDP oxide is susceptible to recess variations and is typically lost before the replacement high-k/metal gate processing.